• 专利附录
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    • 专利摘要:
    electronic device, method for producing the latter and integrated circuit board comprising the electronic device. the present invention encompasses an electronic device (50) comprising an electrically conductive core layer (10) with a first layer (16) composed of electrically conductive material, said first layer being applied on both sides, and with at least one electronic component (20) arranged in a notch (18) of the first layer (16), in which the first layer (16) is covered, in each case with a thermally conductive, electrically insulating layer (34, 36) and another layer ( 22, 26) composed of electrically conductive material is provided in each case on the thermally conductive layer (34, 36), said other layer being coated in each case with a covering layer (38) composed of electrically conductive material, and, furthermore, having metallized through holes (24) composed of the coating layer material (38), which extend through the thermally conductive, electrically insulating layer (36) that covers the electronic component (20) and the other layer (22) composed of electrically and thermally conductive material in order to make contact with the electronic component (20).
    公开号:BR112013015289B1
    申请号:R112013015289-3
    申请日:2011-11-24
    公开日:2020-10-06
    发明作者:Thomas Gottwald；Christian Rössle
    申请人:Schweizer Electronic Ag；
    IPC主号:
    专利说明:

    [0001] The present invention relates to an electronic device, as well as a method for producing it.
    [0002] DE 10 2009 013 818 Al discloses a process for making an electronic device, in which, after providing a support with a first conductive layer, an insulating layer is first applied over this first conductive layer and at least a connection through a first side of the first insulation layer to a second side of the first insulation layer is created. At least two semiconductor chips are mounted on the support and a second layer of insulation applied on the support. The second insulating layer is then opened until the support is uncovered and a metal layer is deposited on top of the exposed second insulating layer, after which the two or more semiconductor chips are separated.
    [0003] In contrast, the present invention proposes an electronic device with the characteristics of claims 1 and 2, a method for producing the same with the characteristics of claims 6 and 7, as well as a printed circuit board comprising devices according to invention with the features according to claim 14 and a method of integrating an electronic device into a printed circuit board with the features of claim 18.
    [0004] The device according to the invention represents a less expensive alternative to embodiments made from ceramic materials. In comparison to the ceramic embodiments, the device is also significantly less susceptible to breakage. As the long aluminum connection wires generally used are replaced with short copper tracks, the resistance of the bonded state is markedly reduced. Furthermore, the design of the invention allows a reduction in the size of the chip, since the galvanic contact employed requires a smaller surface area than the connection wires otherwise commonly used. Due to the symmetrical layered structure, the device also exhibits increased planarity. The difference in thermal expansion coefficients between the chips and the contacts is reduced, resulting in increased reliability. Another advantage is that electrical insulation, for example, from a motor housing, is already integrated into the device module via the dielectric. The device now produced can be integrated directly into a printed circuit board, which represents a comprehensive cost-effective solution.
    [0005] Additional advantages and embodiments of the invention can be illustrated from the description and accompanying drawings.
    [0006] It is evident that the characteristics mentioned above and which are yet to be explained below can be applied not only in the combinations indicated, but also in other combinations or alone, without departing from the scope of the present invention.
    [0007] The invention is represented by way of example by means of exemplary embodiments described by means of schematic drawings (out of scale) and is described in detail as below with reference to the drawings.
    [0008] Figures 1 to 3 illustrate the production according to the invention of an initial semi-finished product in the production of an electronic device.
    [0009] Figure 4 represents a plan view of an embodiment of the first semi-finished product.
    [0010] Figure 5 illustrates the production according to the invention of a second semi-finished product in the production of an electronic device.
    [0011] Figures 6-8 illustrate the placement, lamination, and further processing of the three semi-finished products when producing an electronic device.
    [0012] Figure 9 shows an embodiment of a finished electronic device according to the invention.
    [0013] Figure 10 shows a printed circuit board comprising an integrated device according to the invention, illustrated in cross section.
    [0014] Figure 11 shows another embodiment of a printed circuit board comprising an integrated device according to the invention, illustrated in cross section.
    [0015] Figure 12 shows a side section of a device according to the invention, comprising an integrated component.
    [0016] Figure 13 shows a side section of a device according to the invention, which comprises an integrated and interposed component.
    [0017] In accordance with the method of the invention, a substrate 10 of electrically conductive material having an upper side 12 and a lower side 14 is provided (Figure 1). This substrate can be, for example, a copper foil, but other conductive materials known to the person skilled in the art are also possible. Copper has three useful qualities, namely, high electrical conductivity, high thermal conductivity, and - compared to other materials demonstrating similar conductive qualities - can be purchased at a reasonable cost. The dimensions of the substrate 10 can be chosen by the person skilled in the art as appropriate for a particular case, and taking into account the specific requirements. Typical dimensions can be, for example, 600 mm x 600 mm with a thickness of 0.2 to 1 mm.
    [0018] Optionally, a cheaper metal can be used that exhibits engraving characteristics different from those of the deposited metal, with the consequence that only the support can be selectively engraved. Thus, for example, previously copper-clad aluminum can be used as a support material. This potentially allows for cost and weight savings.
    [0019] In a next step, a first layer 16 of electrically conductive material is applied to the substrate 10. The first layer 16 is applied to the upper side 12 and / or the lower side 14 of the substrate 10. This application can be carried out, for example , by deposition (metallization, galvanic / electrochemical deposition) or by other suitable technical means (such as sputtering, vacuum deposition, etc.) known to the person skilled in the art.
    [0020] The application of the first layer 16 on the substrate 10, according to the invention is carried out in such a way that at least one notch 18 is created. The dimensions (the bottom surface area and depth) of the notch 18 are chosen in such a way that the notch 18 can receive a desired electronic component 20 (cf. Figure 3), which in a next step is inserted into the notch 18 and lying on substrate 10. This electronic component 20 may have, for example, an energy semiconductor or other similar element. The depth d of the notch 18 is chosen, for example, in such a way that the height of the component 20 to be inserted, plus a connective layer 19 to be provided between the substrate 10 and an underside of the component 20 is slightly less than the slot depth d. Or, in other words: the coating (layer 22) is somewhat thicker than the component to be inserted plus the connective layer. The connective layer 19 can be, for example, a solder layer, an organic layer, or a suitable adhesive. The substrate surface 10 in the notch area 18 can optionally be provided with a suitable precious metal (for example, Ag, Au, Sn or equivalent) to form a contact surface for the component. Through an appropriate combination of coating material for the electronic component (or the chip) 20 and coating of the substrate surface 10, compounds can be created that exhibit a higher melting point after welding than before welding. This can be achieved, for example, with the combination of gold (Au) on the component and tin (Sn) on the substrate. Sn melts at 232 ° C, at which point the welding process takes place. During this process, AuSn intermetallic phases are created with a melting point above 232 ° C. This prevents further reflow during further processing.
    [0021] The surfaces of the electronic component are formed in such a way that the underside is designed to work with the intended method of fixation, for example, with a weldable surface if welding is desired. The upper side of the component is formed in such a way as to be adapted for the formation of posterior galvanic contact, for example, by copper coating of the contact surfaces.
    [0022] The process described according to the invention of creating a notch to receive the chip or other component has the advantage that the component is protected during a step of the subsequent process of joint pressing / lamination from the effects of mechanical pressure, such as the height of the coating (and thus the depth d of the notch) is chosen to be slightly greater than the thickness of the component plus the connective layer. This ensures that the surface of the component is located sufficiently below the surface of the layer 22, so that no harmful pressure is exerted on the component during pressing. Creating the notch by applying a conductive layer around the notch has the advantage that the notch has right angles and vertical surfaces (which otherwise can only be reached with great difficulty, not by stripping) , so that the notch can be formed to very precisely adjust the dimensions of the component to be inserted.
    [0023] Any recesses provided around component 20 to compensate for mounting tolerances can be filled after completing the installation and welding process with a suitable material, for example, with a standard casting compound.
    [0024] After inserting component 20 in the notch 18 designated as already described, the first semi-finished product HZ1 is complete.
    [0025] In one embodiment, the first semi-finished product can be supplied with fields or matrices Fl, F2, F3, F4 defined by channels Kl, K2, K3 (cf. Figure 4). These fields Fl, F2, F3, F4 are intended to be electrically isolated from each other at completion. For this purpose, channels Kl, K2, K3 are generated in the first layer 16 and the substrate 10, for example, by stripping; at this point, the channels (still) have studs S, which extend transversely through channels Kl, K2, K3 and mechanically connect them, and which serve to provide stability (retention studs). After the lamination process (to be described below), these retaining studs are removed by means of suitable processes, for example, by drilling, routing, stamping, etc. In this way, the separate potential areas are created on the electronic device. The semicircular or partially circular recesses 28 discernible in the lower area of the first semi-finished product HZ1 in the illustration of Figure 4 show potential for separation (potential insulation) through holes in the finished device. Fields Fl, F2, F3, F4 created as described above serve according to the invention to provide heat propagating surfaces for the electronic components 20. The size of each field Fl, F2, F3, F4 is chosen in such a way that the heat propagation surface assigned to each assembled component is practically identical.
    [0026] The described channels can be filled before the actual lamination process, in order to reduce the amount of resin that must be injected into the layer structure before the pressing process (cf. Figure 6). This may be necessary, for example, if, on the one hand, very narrow insulation distances between the three semi-finished products HZ1, HZ2, and HZ3 are desired, and on the other, long and wide channels are to be filled. This can be achieved, for example, by means of a printing process or a roll coating. The resin does not need to be especially thermally conductive.
    [0027] The fields or matrices described above serve in the context of an aspect of the present invention to designate the surfaces of identical devices for "symmetric" heat propagation for the components to be arranged on the fields / matrices. In this respect, "symmetrical" means that the heat generated by the components in operation is conducted out uniformly due to the identical sized surfaces assigned to each, as also explained below with reference to the illustration in Figure 9.
    [0028] According to one embodiment of the invention, substrate 10 can be singularized (or separated) after the process step illustrated in Figure 2, as shown in Figure 2a.
    [0029] Figure 2a shows on the left a plan view of a substrate 10 with a plurality (91 in the exemplary embodiment shown) of device plates to be equipped with the devices. As can be discerned in the illustration of figure 2a on the right, a singularization for insertion purposes (of electronic components 20 as previously described) can be performed as strips 10 'or as individual plates 10' '. In this exemplary embodiment, the individual plate 10 '(illustrated in detail) has six notches 18. After the components to be inserted have been inserted into the notches, the individual strips or plates are reassembled, for example, by placing the individual strips or plates on a suitable tray (not shown).
    [0030] To make a second semi-finished product HZ2 according to the invention, a first plate element 22 of electrically conductive material is now provided (cf. Figure 5). This first plate element is a flat element, for example, a sheet of a suitable electrically conductive material. The material used may be copper, for the reasons given above. The dimensions of the first plate element are based on substrate measurements 10, for reasons related to the additional processing steps to be described below; in the exemplary embodiment described, these dimensions are approximately 600 mm x 600 mm. The thickness of the plate can be approximately 0.2 mm; however, the person skilled in the art can choose a thicker or thinner plate, depending on the requirements of each particular case.
    [0031] After the step of providing, holes 24 that are created in the plate element in one or more places in order to form through holes in the plate (feedthroughts). Feed through holes 24 can be created by drilling, stamping, stripping, using lasers, or other methods known to the person skilled in the art.
    [0032] After this step, the second semi-finished product HZ2 according to the invention is complete.
    [0033] Next, a second plate element 26 of electrically conductive material is supplied as the third semi-finished product HZ3 (not shown separately).
    [0034] Alignment elements used to align the two semi-finished products with each other when forming the layered structure, which are, in principle, known to the person skilled in the art can be supplied in the first semi-finished product HZ1 and in the third product semifinished HZ3.
    [0035] In order to guarantee a better adhesion of the laminating resins used, the upper surfaces of all products or individual of the three semi-finished products HZ1, HZ2, HZ3 can be made rough using suitable methods and / or coated with layers of adhesion promotion (bonding agents), before the layers are brought together in the next step. In the case of the first semi-finished product, an appropriate bonding agent can be applied simultaneously to the surface of the semi-finished product and the surface of the electronic component.
    [0036] Figure 6 illustrates the arrangement of the three semi-finished products HZ1, HZ2, HZ3 produced in this way.
    [0037] The first semi-finished product HZ1 is placed on top of the third semi-finished product HZ3, with the side of the first semi-finished product HZ1 with the component 20 facing upwards and therefore away from the third semi-finished product HZ3. Before being placed on top of each other, a first prepreg layer 34 is positioned between the two semi-finished products. This first prepreg layer 34 can be designed in such a way that it does not extend into opposite locking parts of all the alignment elements present.
    [0038] After a second pre-impregnated layer 36 has been placed in position, the second semi-finished product HZ2 is placed on the first layer 16 on the upper side 12 of the first semi-finished product HZ1, in such a way that the through holes 24 of the second semi-finished product HZ2 are located in the desired orientation above the electronic component 20, in such a way that they can later serve as metallized through holes or passages for the component 20.
    [0039] Optionally, the prepreg can be pre-drilled, in the area of future passages (through holes 24). For this purpose, the glass mesh in the area of the preformed holes is removed, facilitating the laser drilling process that follows when the prepreg is placed in position and aligned with the through holes 24, since the laser only needs to remove the resin after the lamination process.
    [0040] When selecting prepreg layers, favorable thermal conductivity of the material is an important consideration. For example, highly thermally conductive material can be used. Pre-impregnated with resins containing highly conductive fillers, for example, A1203 or TiN, can be used. The thickness of the prepreg layer is chosen based on the required thermal conductivity, as well as other parameters, for example, dielectric strength.
    [0041] The sandwich structure (layered structure) of Figure 6 thus created is then pressed together or laminated under the process parameters known to the person skilled in the art.
    [0042] In a next step of the process, the through holes 24 filled with pre-impregnated resin during the rolling process are discovered (including all the glass fibers present). This can be accomplished by means of suitable measures known to a person skilled in the art, for example, by means of a laser, as indicated in Figure 7 by stylized laser flashes.
    [0043] After removing the dielectric from the through holes 24, a thin electrically conductive layer is formed in a known manner on the dielectric walls of the holes 24 directly above the electronic component 20 due to the prepreg layer 36. This layer it can be created, for example through chemical copper deposition, for example.
    [0044] A cover layer 38 of electrically conductive material is then applied to the upper layer 22 of the intermediate laminated structure, thus created. This electrically conductive material can consist, for example, of copper again, applied galvanically, in such a way that the through holes 24 are completely filled, or at least sufficiently filled so that good contact with the electronic component 20 located below is ensured. The cover layer can also - as shown in the exemplary embodiment of Figure 8 - be applied to the lower portion (lower layer 26) of the intermediate laminated structure.
    [0045] Figure 9 shows a sectional view of an electronic device 50 according to the invention, consisting of a metal or copper core from the previous substrate 10 and the layers of metal or galvanic copper 16 deposited on it, in which (above and below) thermally conductive dielectric layers 34, 36 are arranged, and in which around (above and below) layers of copper or metal 22, 26, 38 with an embedded component or chip 20 which is contacted via metal / copper routes 24.
    [0046] This structure of an electronic device according to the invention is a stable and highly thermally efficient design, which, compared to comparable performance ceramic substrates, is significantly less expensive to produce, is more scalable downwards , and θ plus nssistθntθ at break. The galvanic contact method allows for smaller chips, as no thick wire for the connection needs to be taken into account.
    [0047] In Figure 9, the heat dissipation paths of device 50 are indicated by dashed arrows, connected with various thermal resistances Rthl to Rth4. As can be discerned from this illustration, device 50, constructed in accordance with the invention, has a number of such heat dissipation paths, which are specifically used to conduct the heat generated in the electronic component away. This is achieved, among other means, through two copper levels of an electrical and thermal connection. This allows the use of components with a higher performance for the same surface area (higher performance density) and / or an increase in the surface available in the design of conductive path structures, without the risk of overheating. This effect is used for heat dissipation, that is, the thermal resistance decreases proportionally to the increase in the cross-sectional area.
    [0048] The materials used in connection with the present invention are advantageously characterized by particularly advantageous thermal conductivity coefficients. Standard pre-impregnated resin materials demonstrate a thermal conductivity of about 0.2 to 0.3 W / mK. However, materials with a thermal conductivity between 0.8 and 2.0 W / mK are possible.
    [0049] Advantageously, the surfaces of the fields or matrices Fl, F2, F3 and one third of the surface of the field F4 are of the same size (see also Figure 4), so that each component has at its disposal the same surface for the heat dissipation. It is taken into account here that the fields in which several components / chips are arranged require a surface as many times larger than that provided by a field with a single component as there are components in the field in order to ensure heat transfer intended by the invention. This avoids the situation where, due to different geometries, a single chip heats up more than the others (the "hot spot" effect), forcing the performance of the entire system to be reduced in order to cool a single hotter chip .
    [0050] The device 50 produced according to the invention can be integrated into a printed circuit board, as illustrated in Figure 10.
    [0051] For this purpose, the electronic device 50 is inserted into a recess of the printed circuit board designed for this purpose and pressed together with it, in such a way that, after the pressing process is completed, the upper surface of the printed circuit is aligned with the top surface of the device. In the illustration in Figure 10, the white layers of the printed circuit board LP represent dielectric layers 110, 111, and the shaded layers represent conductive layers 113. Two stud holes 112 are used to contact the device 50 with the circuit board. LP printed circuit. The (horizontally shaded) layer 114 with low thermal conductivity is above the device 50. Between the heatsink 120 and a lower outer layer (copper) 118 of the printed circuit board L, a layer TIM 119 can be provided to form a thermally uninterrupted junction (TIM: thermal interface material).
    [0052] When installed on an LP printed circuit board, the third semi-finished product HZ3 can alternatively be omitted above layer sequence 34, 26, 38. An example of such a variant is shown in Figure 11. Here, a device electronic 50 'is directly integrated into an LP printed circuit board without the third semi-finished product HZ3. The printed circuit board LP 'generally exhibits the same structure as in Figure 10, with the exception that a thermally conductive prepreg 116 extends additionally between the lower portion of the printed circuit board and the integrated device 50' of the LP 'printed circuit board. The copper layer 118 is then applied as a common outer layer of the printed circuit board and the device 50 '(created simultaneously with the application of a layer of galvanic cover to form the metallic contacts through the holes of stud 112 in the side of the printed circuit board). During the insertion of the device 50 'with the printed circuit board LP', these are pressed together with this thermally conductive outer dielectric layer. Below the device 50 ', the lower portion of the outer layer 116 is again followed by the copper layer 118, a layer of TIM 119, and a heat sink 120.
    [0053] Alternatively, the printed circuit board can be designed in such a way that it extends under the device and assumes the function of a heatsink surface (not shown) fulfilled by the heatsink 120 in two embodiments represented in Figures 11 and 12.
    [0054] The area of the printed circuit board above the device can - as indicated previously - be designed in such a way that a poor result of heat conduction upwards. In this way, overheating of any temperature sensitive components on the printed circuit board is avoided or at least minimized. For this purpose, as an alternative or in addition to layer 114 with low thermal conductivity shown in Figures 11 and 12, at least one cavity (not shown) can be provided in this upper layer 114 and directly adjacent to the device. The electrical and mechanical connection of the device to the printed circuit board is then carried out through the side edges and the remaining portions of the surface.
    [0055] According to one embodiment of the invention, two layers of prepreg 36, 37 can be positioned between the first semi-finished product HZ1 and the second semi-finished product HZ2, among which a component is, in turn, positioned. This component can be, for example, a component 60 for current measurement or current sensor (shunt) (in the illustrated embodiment, a film component; cf. Figure 12). This component is contacted - as previously described in a different context - for example, through metallized laser through holes 62.
    [0056] In another embodiment - both as described in connection with Figure 12 - at least one passive, discrete component 70 can be positioned between the two layers of prepreg 36, 37 between the first semi-finished product HZ1 and the second semi-finished product HZ2, for example, by means of an IP intermediate plate, as shown in Figure 13. Depending on the height of such an item, a cavity 17 can be provided in the first semi-finished product HZ1 to receive the IP intermediate plate. Contact is made, again, through metallized through-laser holes -72 or by similar means.
    [0057] Aspects of the invention are summarized in the following list of listed aspects: 1. An electronic device (50) comprising an electrically conductive core layer (10) with a first layer (16) composed of electrically conductive material, said first layer being applied on both sides, and with at least one electronic component (20) disposed in a notch (18) of the first layer (16), in which the first layer (16) is covered, in each case with an electrical insulator, the thermally conductive layer (34, 36), and another layer (22, 26) composed of electrically conductive material is provided in each case on the thermally conductive layer (34, 36), said other layer being coated in each case with a cover layer (38) composed of electrically conductive material, and further comprising metallized through holes (24) composed of the cover layer material (38), the holes (24) extending through the thermally conductive layer electrically insulating log (36) covering the electronic component (20) and the other layer (22) composed of electrically and thermally conductive material in order to make contact with the electronic component (20). 2. The electronic device (50) according to aspect 1, wherein the core layer (10) is composed of copper or copper-clad aluminum. 3. The electronic device (50) according to aspect 1 or 2, in which the first layer (16) is copper deposited galvanically. 4. The electronic device (50) according to any of aspects 1 to 3, in which a depth (d) of the notch (18) is slightly greater than the height of the electronic component (20), plus a connective layer (19). 5. The electronic device (50) according to any one of aspects 1 to 4, in which, in the case of more than one electronic component (20), each component (20) is assigned to a surface for heat dissipation or propagation in such a way that the heat dissipation or propagation surface for each installed component (20) is practically identical. 6. Electronic device (50) comprising an electrically conductive core layer (10) with a first layer (16) composed of electrically conductive material, said first layer being applied on both sides, and with at least one electronic component ( 20) arranged in a notch (18) of the first layer (16), where the first layer (16) above the electronic component (20) is covered with a thermally conductive electrically insulating layer (36) and another layer (22) composed of electrically conductive material is provided on the thermally conductive layer (36), said other layer being coated with a covering layer (38) composed of electrically conductive material, and which further comprises metallized through holes (24) composed of cover layer material (38), the holes extending through the electrically insulating thermally conductive layer (36) covering the electronic component (20) and the other layer (22) composed using electrically conductive and thermal material for the purpose of making contact with the electronic component (20) The device according to Aspect 6 is intended as an intermediate product, for example, for integration into a printed circuit board, as described here and in the description described with reference to the exemplary embodiment of Figure 11. 7. The electronic device (50 ') according to aspect 6, wherein the core layer (10) is composed of copper or copper-clad aluminum. 8. The electronic device (50 ') according to aspect 6 or 7, in which the first layer (16) is copper deposited galvanically. 9. The electronic device (50 ') according to any of aspects 6 to 8, in which the depth (d) of the notch (18) is slightly greater than the height of the electronic component (20), plus a layer connective (19). 10. The electronic device (50 ') according to any of aspects 6 to 9, in which, in the case of more than one electronic component (20), each component (20) is assigned to a surface for heat dissipation or propagation in such a way that the heat dissipation or propagation surface for each installed component (20) is practically identical. 11. A method of producing an electronic device (50) comprising the following steps: - making a first semi-finished product (HZ1) by means of: providing a substrate (10) of electrically conductive material that has an upper portion (12) and a lower portion (14); apply a first layer (16) of conductive material over the upper portion (12) and / or the lower portion (14) of the substrate (10), with at least one notch (18) to receive an electronic component to be supplied in the first layer (16); - insert at least one component (20) in at least one notch (18); - making a second semi-finished product (HZ2) by: - providing a first plate element (22) of electrically conductive material; - creating holes (24) in the first plate element (22) of the holes (24) to subsequently form through-through metallized holes; - making a third semi-finished product (HZ3) by: - providing a second plate element (26) of electrically conductive material; - arrange the three semi-finished products (HZ1, HZ2, HZ3) as a layered structure, placing the first semi-finished product (HZ1) in the third semi-finished product (HZ3), and placing the second semi-finished product (HZ2) on the first semi-finished product ( HZ1), with prepreg layers (34, 36) to be supplied between them, respectively; - laminate the structure, - discover the resin-filled holes (24) of the first plate element (22) after the lamination step, - at least partially fill the holes (24) with conductive material for the purpose of creating a contact. 12. The method according to aspect 11, wherein the substrate (10) is made of copper or copper-clad aluminum. 13. The method, according to aspect 11 or 12, in which the application of the first layer (16) is carried out by means of galvanic deposition. 14. The method, according to any of aspects 11 to 13, in which the notch (18) is formed by selective application of the first layer (16) in such a way that a depth (d) of the notch (18) is a slightly higher than the height of the electronic component (20) to be inserted, plus a connective layer (19). 15. The method, according to any of aspects 11 to 14, in which, after the insertion step in at least one electronic component (20), recesses in the notch (18) around the component (20) they are full before the pressing stage. 16. The method, according to any of aspects 11 to 15, in which the channels (Kl, K2, K3) are generated in the first layer (16) and the substrate (10), having the studs retention channels ( S) to be removed after the lamination step. 17. A method of producing an electronic device (50 ') comprising the following steps: - making a first semi-finished product (HZ1) by means of: providing a substrate (10) of electrically conductive material with a top portion (12) and a lower portion (14); - applying / depositing a first layer (16) of conductive material on the upper portion (12) and / or the lower portion (14) of the substrate (10), with at least one notch (18) to receive an electronic component being supplied in the first layer (16); inserting a component (20) in at least one notch (18); - making a second semi-finished product (HZ2) by: - providing a first plate element (22) of electrically conductive material; - create holes (24) in the first plate element (22) to subsequently form through metalized holes; - arrange the two semi-finished products (HZ1, HZ2) as a layered structure, placing the second semi-finished product (HZ2) on the first semi-finished product (HZ1), with a pre-impregnated layer (36) to be supplied between them; - laminate the structure, - discover the holes (24) in the first plate element (22) filled with resin after the lamination process; - at least partially fill the holes (24) with conductive material (38) in order to form metallic through holes. 18. The method according to aspect 17, wherein the substrate (10) is made of copper or copper-clad aluminum. 19. The method, according to aspect 17 or 18, in which the application of the first layer (16) is carried out by means of galvanic deposition. 20. The method, according to any of aspects 17 to 19, in which the notch (18) is formed by selective application of the first layer (16) in such a way that a depth (d) of the notch (18) is a slightly larger than the height of the electronic component to be inserted (20), plus a connective layer (19). 21. The method, according to any of aspects 17 to 20, in which, after the step of inserting the component of at least one electronic component (20), recesses in the notch (18) around the component (20 ) are full before the pressing stage. 22. The method, according to any of aspects 17 to 21, in which the channels (Kl, K2, K3) are generated in the first layer (16) and the substrate (10), having the studs retention channels ( S) to be removed after the lamination step. 23. The printed circuit board (LP) with an electronic device (50), according to any of aspects 1 to 5. 24. The printed circuit board (LP), according to aspect 23, on which a surface of the printed circuit board (LP) ends flush with the electronic device (50). 25. The printed circuit board (LP) according to aspect 24, in which a heat sink (120) is connected to the discharge junction of the printed circuit board (LP) and the electronic device (50). 26. The printed circuit board (LP) according to any of the aspects 23 to 25, in which the laying of a layer (114) with a low thermal conductivity is desired between the electronic device (50) and conductive paths (113 ) of the printed circuit board (LP) located above. 27. A printed circuit board (LP ') with an electronic device (50') according to any of aspects 6 to 10. 28. The printed circuit board (LP '), according to aspect 27, in which an insulating portion (110) of the printed circuit board (LP ') ends flush with the electronic device (50'). 29. The printed circuit board (LP ') according to aspect 28, in which a heat sink (120) is connected to the junction discharge of the printed circuit board (LP') and the electronic device (50 '). 30. The printed circuit board according to any of aspects 27 to 29, in which a layer (114) with low thermal conductivity is provided between the electronic device (50 ') and conductive tracks (113) of the printed circuit board (LP ') located above. 31. The method, according to any of aspects 11 to 22, in which, during the laying step, two layers of prepreg (36, 37) are placed between the first semi-finished product (HZ1) and the second product semi-finished (HZ2), with an additional component (60) and / or an intermediate (IP) being positioned between the two pre-impregnated layers (36, 37), the component or intermediate being contacted through through-through metalized holes (62, 72) after the pressing step. 32. The method, according to aspect 31, in which the holes (62, 72) for contacting the additional component (60) and / or the intermediate (PI) are created by laser drilling followed by plating. 33. The method, according to aspect 31 or 32, in which, during the step of making the second semi-finished product (HZ2), the through holes for the contact of the additional component (60) and / or the intermediate (IP) They are provided. 34. The method, according to any of aspects 31 to 33, in which a cavity (17) is provided to receive the additional component (60) and / or the intermediate (IP). 35. The electronic device (50, 50 ') according to any of aspects 1 to 10, further comprising an additional component (60) and / or an intermediate (IP) between two layers of electrical insulator (36, 37). 36. A method for integrating an electronic device (50, 50 ') into a printed circuit board, comprising the steps of: - providing an electronic device (50, 50') in accordance with any of aspects 1 to 10 or according to aspect 35; - providing a printed circuit board comprising a recess for receiving the electronic device (50, 50 '); insert a layer (114) with low thermal conductivity into the recess; - insert the electronic device (50, 50 ') into the recess of the printed circuit board on the layer (114) with low thermal conductivity; - press together the layered structure thus created; apply an electrically conductive layer (118) forming a common external layer that also serves to contact the electronic device (50, 50 ') with the printed circuit board (LP, LP'). 37. The method, according to aspect 36, in which a heat sink (120) is mounted on the layer forming a common outer layer (118) in the area of the electronic device (50, 50 '). 38. The method, according to aspect 37, in which a TIM layer (119) is placed between the electrically conductive layer (118) and the heat sink (120) to form a thermally uninterrupted junction. 39. The method, according to any of aspects 36 to 38, in which a dielectric thermal conductor (116) is placed between the printed circuit board with an electronic device inserted on one side and the common outer layer (118) of the other side.
    权利要求:
    Claims (16)
    [0001]
    1. Electronic device (50, 50 ") characterized by the fact that it comprises an electrically conductive core layer (10) with a first layer (16) composed of electrically conductive material, said first layer (16) being applied to both sides, and with at least one electronic component (20) arranged in a notch (18) of the first layer (16), in which the first layer (16) is covered above the electronic component (20), with a thermally conductive electrically layer insulating (36), and another layer (22) consisting of electrically conductive material is provided in the thermally conductive layer (36), said other layer (22) being coated with a covering layer (38) composed of electrically conductive material, and which further comprises through-holes (24) composed of material of the covering layer (38), the through-holes (24) extending through the electrically insulating thermally conductive layer (36) covering the compone electronic (20) and the other layer (22) made up of electrically and thermally conductive materials for the purpose of making contact with the electronic component (20).
    [0002]
    2. Electronic device (50) according to claim 1, characterized in that the first layer (16) is covered on each side with a thermally conductive electrically insulating layer (34, 36), respectively, with another layer (22, 26) composed of electrically conductive material provided in each thermally conductive layer (34, 36), respectively, said other layer (22, 26) being coated with a covering layer (38) composed of electrically conductive material, respectively.
    [0003]
    3. Electronic device (50, 50 '), according to claim 1 or 2, characterized by the fact that in case of more than one electronic component (20), each component (20) is assigned to a surface to dissipate the heat in such a way that the surface to dissipate heat for each installed component (20) is practically identical.
    [0004]
    4. Method of producing an electronic device (50) characterized by the fact that it comprises the following steps: - creating a first semi-finished product (HZ1) through: supplying a substrate (10) of electrically conductive material having an upper side ( 12) and a lower side (14); - application / deposit of a first layer (16) of conductive material on the upper side (12) and / or on the lower side (14) of the substrate (10), with at least one notch (18) to receive an electronic component being supplied in the first layer (16); - insertion of a component (20) in at least one notch (18); - creating a second semi-finished product (HZ2) by: - providing a first plate element (22) of electrically conductive material; - creation of holes (24) in the first plate element (22) to subsequently form through metalized holes; - arrange the two semi-finished products (HZ1, HZ2) as a layered structure, placing the second semi-finished product (HZ2) in the first semi-finished product (HZ1), with a pre-impregnated layer (36) being provided in the middle; - laminate the structure, - discover the resin-filled holes (24) of the first plate element (22) after the lamination step, - at least partially fill the holes (24) with conductive material (38) in order to create a through hole.
    [0005]
    5. Method of production of an electronic device (50), according to claim 4, characterized by the fact that it comprises the following stage before the stage of disposing: - creating a third semi-finished product (HZ3) through: - supplying a second plate element (26) of electrically conductive material; and where the disposition stage comprises: - arranging the three semi-finished products (HZ1, HZ2, HZ3) as a layered structure, placing the first semi-finished product (HZ1) in the third semi-finished product (HZ3), and placing the second semi-finished product (HZ2) in the first semi-finished product (HZ1) with a pre-impregnated layer (36) being supplied in the middle, respectively.
    [0006]
    6. Method according to claim 4 or 5, characterized by the fact that after the step of inserting at least one electronic component (20), the recesses in the notch (18) around the component (20) are filled, before the pressing phase.
    [0007]
    Method according to any one of claims 4 to 6, characterized in that the channels (Kl, K2, K3) are generated in the first layer (16) and in the substrate (10), in which the channels have retention of nails (S) to be removed after the lamination step.
    [0008]
    Method according to any one of claims 4 to 7, characterized in that during the laying step, two pre-impregnated layers (36, 37) are placed between the first semi-finished product (HZ1) and the second product semi-finished (HZ2), with an additional component (60) and / or an intermediate (IP) being positioned between the two pre-impregnated layers (36, 37), the component or intermediate being contacted through through metalized holes (62, 72 ), after the pressing step.
    [0009]
    9. Method, according to claim 8, characterized by the fact that during the step of creating the second semi-finished product (HZ2), through holes to contact the additional component (60) and / or the intermediate (PI) are provided .
    [0010]
    10. Printed circuit board (LP; LP ') characterized by the fact that it comprises an electronic device (50, 50'), as defined in any one of claims 1 to 3.
    [0011]
    11. Printed circuit board (LP; LP '), according to claim 10, characterized by the fact that the surface of the printed circuit board (LP, LP') ends aligned with the electronic device (50, 50 ') , and in which a heatsink (120) is connected to the aligned junction of the printed circuit board (LP, LP ') and to the electronic device (50, 50').
    [0012]
    12. Printed circuit board (LP; LP '), according to claim 10 or 11, characterized by the fact that a layer (114) with low thermal conductivity is provided between the electronic device (50, 50') and the conductive tracks (113) of the printed circuit board (LP, LP ') located above.
    [0013]
    13. Method for integrating an electronic device (50, 50 ') with a printed circuit board characterized by the fact that it comprises the steps of: providing an electronic device (50, 50'), as defined in any of the claims from 1 to 3; - providing a printed circuit board comprising a recess for receiving the electronic device (50, 50 '); insert a layer (114) with low thermal conductivity in the recess; - insert the electronic device (50, 50 ') into the recess of the printed circuit board on the layer (114) with a low thermal conductivity; - press together the layered structure thus created; apply an electrically conductive layer (118) forming a common outer layer, which also serves to contact the electronic device (50, 50 ') with the printed circuit board (LP, LP').
    [0014]
    14. Method according to claim 13, characterized in that a heat sink (120) is mounted on the layer that forms a common outer layer (118) in the area of the electronic device (50, 50 ').
    [0015]
    15. Method according to claim 14, characterized by the fact that a TIM layer (119) is placed between the electrically conductive layer (118) and the heat sink (120) to form a thermally seamless junction.
    [0016]
    16. Method according to any one of claims 13 to 15, characterized in that a thermally conductive dielectric (116) is placed between the printed circuit board with an electronic device inserted on one side, and the common outer layer ( 118) on the other side.
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    同族专利:
    公开号 | 公开日
    DE102010060855A1|2012-05-31|
    CN103339726A|2013-10-02|
    JP5767338B2|2015-08-19|
    RU2556274C2|2015-07-10|
    JP2014503997A|2014-02-13|
    US8811019B2|2014-08-19|
    EP2524394A2|2012-11-21|
    WO2012072212A3|2012-09-07|
    CN103339726B|2014-12-31|
    EP2524394B1|2013-07-31|
    RU2013128431A|2015-01-10|
    BR112013015289A2|2018-05-15|
    US20130329370A1|2013-12-12|
    WO2012072212A2|2012-06-07|
    DE202011110023U1|2012-11-12|
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    法律状态:
    2018-12-18| B06F| Objections, documents and/or translations needed after an examination request according [chapter 6.6 patent gazette]|
    2019-10-15| B06U| Preliminary requirement: requests with searches performed by other patent offices: procedure suspended [chapter 6.21 patent gazette]|
    2020-05-19| B09A| Decision: intention to grant [chapter 9.1 patent gazette]|
    2020-10-06| B16A| Patent or certificate of addition of invention granted [chapter 16.1 patent gazette]|Free format text: PRAZO DE VALIDADE: 20 (VINTE) ANOS CONTADOS A PARTIR DE 24/11/2011, OBSERVADAS AS CONDICOES LEGAIS. |
    优先权:
    申请号 | 申请日 | 专利标题
    DE102010060855A|DE102010060855A1|2010-11-29|2010-11-29|Electronic component, method for its production and printed circuit board with electronic component|
    DE102010060855.6|2010-11-29|
    PCT/EP2011/005912|WO2012072212A2|2010-11-29|2011-11-24|Electronic device, method for producing the latter, and printed circuit board comprising electronic device|
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